The memory hierarchy plays a vital role in determining the overall performance of a computer system. As modern systems pack more and more cores, the memory hierarchy associated with these cores must scale as well in order to feed the cores at a sufficiently fast rate and to hold the working set of all the concurrent execution threads. This course covers the basic trade-off in architecting a high performance memory hierarchy at all levels, starting from the on-chip cache to the main memory. We will also discuss the influence emerging technologies are having on the memory system and the new challenges they pose to system design. The lectures will be combination of covering fundamental material in memory systems as well as discussing the state-of-the-art research in each category.
The five lectures will focus on the following topics:
1. On-Chip Cache Management
2. DRAM Memory Systems
3. Architecting 3D Memory Systems
4. Emerging Non-Volatile Memory (NVM) Technologies
5. Advances in Memory Reliability
Moinuddin Qureshi is an Associate Professor at Georgia Tech, where he conducts research in building high-performance, reliable, and scalable memory systems. Prior to joining Georgia Tech, he was a research scientist at IBM, where he formulated the caching algorithms for Power 7 systems and drove the architecture research on Phase Change Memories.