Slot 1

Provably-Secure Computing through Formal Verification and Inductive Synthesis
Sanjit Seshia, University of California, Berkeley, USA

Abstract

Security-critical applications face a range of threats including exploits in privileged software such as the operating system and hypervisor, and vulnerabilities in hardware. In order to protect sensitive data from such privileged adversaries, there is increasing interest in developing and using secure hardware primitives, such as Intel SGX, ARM TrustZone, and Sanctum RISC-V extensions, as well as in using formal methods to obtain strong assurances of security.

In this tutorial, I will discuss the design and use of advanced formal methods for building applications with provable security guarantees while leveraging trusted hardware platforms. At the software level, compiler and verification techniques can be used to develop applications that can be verified (at the level of machine code) to not leak secrets, both via their outputs and certain side channels. Furthermore, I will discuss how formal models of trusted hardware can be leveraged to port programs and their correctness proofs across different hardware platforms. Finally, I will discuss how the use of formal inductive synthesis --- synthesis from examples while satisfying formal properties --- can be leveraged to reduce the verification burden. The tutorial will involve demonstrations and exercises with advanced tools for modeling, verification, and synthesis.

Bio

Sanjit A. Seshia is Professor in the Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley. He received an M.S. and Ph.D. in Computer Science from Carnegie Mellon University, and a B.Tech. in Computer Science and Engineering from the Indian Institute of Technology, Bombay. His research interests are in formal methods for dependable and secure computing, with a current focus on the areas of cyber-physical systems, computer security, and robotics. He has made pioneering contributions to the areas of satisfiability modulo theories (SMT), SMT-based verification, and inductive program synthesis. He is co-author of a widely-used textbook on embedded, cyber-physical systems and has led the development of technologies for cyber-physical systems education based on formal methods. His awards and honors include a Presidential Early Career Award for Scientists and Engineers (PECASE), an Alfred P. Sloan Research Fellowship, the Frederick Emmons Terman Award for contributions to electrical engineering and computer science education, the Donald O. Pederson Best Paper Award for the IEEE Transactions on CAD, and the School of Computer Science Distinguished Dissertation Award at Carnegie Mellon University. He is a Fellow of the IEEE.


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