The computer architecture community faces an important and exciting challenge. On one hand, Moore’s law is slowing down, stressing traditional assumptions around cheaper and faster systems every year. But at the same time, our demand continues to grow at phenomenal rates, with deeper analysis over ever growing volumes of data, new diverse workloads in the cloud, and smarter edge devices. Is the situation dire, or is this just another phase in the evolution of system architecture? In this talk, I will summarize recent technology and workload trends and discuss likely scenarios for the evolution of future system architectures, with a focus on large "warehouse-scale computing" environments. Specifically, I will discuss how responding to the current opportunities will require more “out-of-the-box” designs ---considering the entire datacenter as a computer, co-designing across hardware and software, and developing new architectural constructs.
Partha Ranganathan is currently a distinguished engineer and technical lead for hardware and datacenters at Google designing systems at scale. Before this, he was a HP Fellow and Chief Technologist at Hewlett Packard Labs where he led their research on systems and datacenters. Partha has worked on several interdisciplinary systems projects with broad impact on both academia and industry, including widely-used innovations in energy-aware user interfaces, heterogeneous multi-cores, power-efficient servers, and disaggregated and data-centric data centers. He has published extensively, is a co-inventor on more than 100 patents, and his work has often been featured in the popular press, including the New York Times, Wall Street Journal, San Fransisco Chronicle, etc He has been named a top-15 enterprise technology rock star by Business Insider, one of the top 35 young innovators in the world by MIT Tech Review, and is a recipient of the ACM SIGARCH Maurice Wilkes award and Rice University's Outstanding Young Engineering Alumni award. He is also a Fellow of the IEEE and ACM.
The talk will share the Yogitech entrepreneurial story and how ideas helped to go across the several challenges, transforming them in opportunities. It will also describe the ongoing industry transformation and the role of cutting edge technologies.
Monia Chiavacci is acting today as Site Director of Intel Italia Corporation. She manages the Functional Safety Engineering team based in Pisa. Together with Riccardo Mariani, in 2000, she founded YOGITECH S.p.A where she worked as Business Unit Manager responsible for all the functional safety consultancies and methodology. Previously she was responsible for the analog & mixed signal verification and design team.
Before founding YOGITECH, she worked in a VLSI design centre as analog designer since 1998. Her work experiences cover a lot of aspects in the field of analog and mixed signal design, high reliability systems in critical environments. She is working in the functional safety field since many years (2005) becoming expert in safety standards (IEC 61508, ISO 26262 and EN 50128/9). She participated to the ISO/PAS 19451 semiconductor working group and she took the leadership of the “Analogue and Mixed signal component” topic groups. Moreover she contributes to the ISO 26262 second edition as part of Italian working group.
The topics of this year's Summer School will be presented by the following world-class experts:
The structure of the Summer School is such that the participants will have the opportunity to intensely interact with the lecturers during the full duration of the summer school (during meals, breaks, evening activities). All lecturers will stay on campus during the full week.
The summer school consists of 12 courses spread over two morning slots and two afternoon slots. Per slot there are three parallel courses of which you can take only one. When applying for admission, you will be asked to indicate your preference.
The courses have been allocated to slots in such a way that it is in any case possible to create a summer school program that matches your research interests.