Slot 1

Die Stacking Integration: Technologies and Applications
Gabriel H. Loh, AMD Research

Abstract

The continuation of Moore's Law faces a range of difficult challenges: from scaling semiconductor technologies to smaller dimensions due to physics, to the economics of operating multi-billion-dollar state-of-the-art fabrication facilities. Die stacking technologies provide one possible path to keep at least some of the aspects of Moore's Law going.

In this course, I will cover the technological and broader industrial background for die stacking and describe some of the different types of die-stacking options available, and then I will go explore a variety of computer architecture applications of die stacking, some recent research results on die stacking architectures. I will conclude with a discussion on open topics requiring more research from the broader community.

Bio

Gabriel H. Loh is a Research Fellow in AMD Research, the research and advanced development lab for Advanced Micro Devices, Inc. Gabe received his Ph.D. and M.S. in computer science from Yale University in 2002 and 1999, respectively, and his B.Eng. in electrical engineering from the Cooper Union in 1998. Gabe was also a tenured associate professor in the College of Computing at the Georgia Institute of Technology, a visiting researcher at Microsoft Research, and a senior researcher at Intel Corporation. He is a Fellow of the ACM and IEEE, recipient of ACM SIGARCH's Maurice Wilkes Award, Hall of Fame member for the MICRO, ISCA, and HPCA conferences, (co-)inventor on over one hundred US patent applications and sixty granted patents, and a recipient of a U.S. National Science Foundation CAREER Award. His research interests include computer architecture, processor microarchitecture, emerging technologies and 3D die stacking.


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